IBM Research

8th Annual Austin CAS Conference 2007 8th Annual Austin CAS Conference - Executive Summary On March 2, 2007, the Austin Center for Advanced Studies held a successful 8th Annual Austin CAS Conference. Approximately 100 of the IBM management and technical community, as well as university researchers, attended this one-day conference that hosted 25 professors and research students from around the world as they returned to IBM to present the results of their IBM supported research. Divisions around the Austin site enjoyed hearing innovative techniques and cutting-edge results that will directly benefit IBM's research and development efforts in hardware, software, systems technology, and business management. An inspiring Keynote by Peter Hofstee (IBM Systems &Technology Group, Development, DE, Architect, STI Design Center, Member IBM Academy of Technology & Master Inventor), shared insights on "Cell BE Yesterday, Today and Tomorrow". DVDs of the conference proceedings are available and papers will be posted on our website in the coming weeks: http://www.research.ibm.com/acas. We list below the Final Program that were presented during this non-IBM-Confidential conference. Please contact Heather Wagner and Christa Mace for more details. CLICK HERE FOR PRESENTATIONS   ********************************************* Final Program Friday, March 2, 2007 9:00am Breakfast & Registration 9:30am Welcome and Opening Remarks Sani Nassif, Manager, Tools and Technology, IBM Austin Research Laboratory 9:40am Session 1: Variability and Design-for-Manufacture Session Chair: Jerry Hayes On-chip Process Variation Detection and Compensation for Parametric Yield Enhancement in sub-100nm CMOS technology Amlan Ghosh and Richard B. Brown, University of Utah IBM Technical Contacts: Rahul M. Rao, High Performance VLSI Design and Ching-Te Chuang, Manager, High-Performance Circuit Design, IBM Research IBM Sponsor: Lorraine Herger, Director, IBM Austin Research Laboratory Extraction and Modeling of Process Variations for Robust Nanoscale Design Wei Zhao, Yu Cao, Department of Electrical Engineering, Arizona State University IBM Technical Contacts: Frank Liu, Kanak Agarwal, Dhruya Acharyya, Sani Nassif, Kevin Nowka, Tools and Technology, IBM Austin Research Laboratory IBM Sponsor: Lorraine Herger, Director, IBM Austin Research Laboratory Built-in-Self-Test Methods for Big-D/Small-A Systems Erdem S. Erdogan and Sule Ozev, Electrical & Computer Engineering, Duke University IBM Technical Contact:: Jim Dillinger, STI Design Center - Staffing Focal Point and Manager of Layout and Integration, IBM Systems and Technology Group IBM Sponsor: Kathy Papermaster, Director, STI Design Center, IBM Systems and Technology Group 10:40am Break 11:00am Session 2: Processor Design and Design Automation Session Chair: Jun Sawada Electrical Design Space Exploration for High Speed Servers Caleb Wesley, Electrical and Computer Engineering Department, North Carolina State University IBM Technical Contacts: Bhyrav Mutnury, Nam Pham, Erdem Matoglu and Moises Cases, IBM Systems and Technology Group IBM Sponsor: Jan Janick, Vice President, Modular Server and Storage Development, IBM Systems and Technology Group Gate Sizing for Cell Library-Based Designs Shiyan Hu, Mahesh Ketkary*, Jiang Hu, Department of Electrical Engineering, Texas A&M University, *Strategic CAD Labs, Intel Corporation IBM Technical Contact: Chuck Alpert, Austin Research Lab, Tools & Technology IBM Sponsor: Lorraine Herger, Director, Austin Research Laboratory 11:40pm Lunch & Keynote - Bldg 908 Cafeteria “Cell BE Yesterday, Today and Tomorrow” Peter Hofstee, Distinguished Engineer, Architect, STI Design Center, IBM Systems and Technology Group, Member IBM Academy of Technology & Master Inventor 1:15pm Session 3: Power and Thermal Issues and Analysis Session Chair: Juan Rubio Pentium M Power and Thermal Analysis Heather Hanson* and Stephen Keckler, Department of Computer Sciences, *Department of Electrical and Computer Engineering, University of Texas at Austin IBM Technical Contact: Karthick Rajamani, Power Aware Systems, IBM Austin Research Laboratory IBM Sponsor: Lorraine Herger, Director, IBM Austin Research Laboratory HeDGE: Hybrid Dataflow Graph Execution in the Issue logic Suriya Subramanian Kathryn S. McKinley, Department of Computer Sciences, University of Texas at Austin IBM Technical Contact: Frank O'Connell, Technical Computing Performance, IBM Systems & Technology Group IBM Sponsor: George Wang, Vice President, Systems Performance, IBM Systems and Technology Group 1:55pm Break 2:10pm Session 4: Performance Characterization and Benchmarking Session Chair: Nat Viswanathan Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks Ajay Joshi1, Lieven Eeckhout 2, Robert H. Bell Jr.3, and Lizy John1, 1The University of Texas at Austin, Texas, 2Ghent University, Belgium, 3IBM Systems and Technology Group IBM Technical Contacts: Alan Mackay, Commercial Performance and Alex Mericas, Processor Performance, IBM Systems and Technology Group IBM Sponsor: George Wang, Vice President, Systems Performance, IBM Systems and Technology Group Performance Characterization of SPEC CPU Benchmarks on Intel's Core Microarchitecture based processor Sarah Bird, Aashish Phansalkar, Lizy K. John, Electrical and Computer Engineering, University of Texas at Austin IBM Technical Contacts: Alex Mericas and Rajeev Indukuru, IBM Systems and Technology Group IBM Sponsor: George Wang, Vice President, Systems Performance, IBM Systems and Technology Group Developing Techniques for Dependability Benchmarking of Operating Systems Weining Gu, Ravi Iyer and Zbigniew Kalbarczyk, Center for Reliable and High-Performance Computing (CRHC), University of Illinois at Urbana-Champaign IBM Technical Contact: Bruce Mealey, Tom Mathews and Sara Epsztein, AIX RAS, IBM Systems and Technology Group IBM Sponsor: Kumar Nallapati, Director, AIX Development, IBM Systems and Technology Group 3:10pm Break Techniques and Frameworks for Multithreaded Workload Synthesis Clay Hughes and Tao Li, Department of Electrical and Computer Engineering, University of Florida IBM Technical Contact: Rob Bell Jr., Logic Design and Performance Analysis, IBM Systems and Technology Group IBM Sponsor: Jan Janick, Vice President, Modular Server and Storage Development, IBM Systems and Technology Group RAMP-White: An FPGA-Based Coherent Shared Memory Parallel Computer Emulator Hari Angepat, Dam Sunwoo and Derek Chiou, Electrical and Computer Engineering, University of Texas at Austin IBM Technical Contact: Volker Strumpen, Verification & Analysis, IBM Austin Research Laboratory IBM Sponsor: Lorraine Herger, Director, IBM Austin Research Laboratory Closing Comments Search ACAS Web: