IBM Austin Center for Advanced Studies
Year 2005/06 Projects
Here are the Year 2005/06 award winning research proposals and projects currently underway. If you are interested in starting a collaborative project we invite you to contact us.
~ Full Papers ~
Capturing Locality of Reference and Branch Predictability of Programs in Synthetic Workloads
Ajay Joshi, Rob Bell Jr.*, Lizy John, Department of Electrical and Computer Engineering,
University of Texas at Austin, *IBM Systems and Technology Group
IBM Technical Contact: Alex Mericas, IBM Systems & Technology Group, Development, Hardware Performance Instrumentation
IBM Sponsor: Mark Papermaster, IBM Systems & Technology Group, Development, VP, Microprocessor Technology Development, IBM Systems Group
Original Proposal: Capturing the Essence of Emerging Workloads for Performance/Power Estimation and Validation
Automatic Testcase Synthesis and Performance Model Validation for High-Performance PowerPC Processors
Rob Bell Jr.* and Lizy John, Department of Electrical and Computer Engineering,
University of Texas at Austin, *IBM Systems and Technology Group
IBM Technical Contact: Alex Mericas, IBM Systems & Technology Group, Development, Hardware Performance Instrumentation
IBM Sponsor: Mark Papermaster, IBM Systems & Technology Group, Development, VP, Microprocessor Technology Development, IBM Systems Group
Original Proposal: Capturing the Essence of Emerging Workloads for Performance/Power Estimation and Validation
The Transient Cache: Modern Programs and Modern Cache Design
Stephen Blackburn* and Kathryn McKinley, Department of Computer Sciences,
University of Texas at Austin, *Australian National Unversity
IBM Technical Contact: Frank O'Connell, IBM Systems & Technology Group, Development, Technical Computing Performance
IBM Sponsor: Mark Papermaster, IBM Systems & Technology Group, Development, VP, Microprocessor Technology Development, IBM Systems Group
Original Proposal: Write Caches: Expanding Write Buffer Duties
Power and Performance Optimization: A Case Study with the Pentium M Processor
Heather Hanson* and Stephen Keckler, Department of Computer Sciences,
*Department of Electrical and Computer Engineering, University of Texas at Austin
IBM Technical Contact: Ron Kalla, IBM Systems & Technology Group, Development, Processor Development
IBM Sponsor: Mark Papermaster, IBM Systems & Technology Group, Development, VP, Microprocessor Technology Development, IBM Systems Group
Original Proposal: Continuous Optimization and Coordinated Power Management
Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization
Santosh Talli, Ram Srinivasan, Jeanine Cook,
Klipsch School of Electrical and Computer Engineering, New Mexico State University
IBM Technical Contact: Lee Eisen, STSM,eClipz Development
IBM Sponsor: Mark Papermaster, IBM Systems & Technology Group, Development, VP, Microprocessor Technology Development, IBM Systems Group
Original Proposal: Comprehensive Compiler-Directed Power Management
High Speed Optical Interconnects for High-Throughput, Low Latency Server Systems
Yin-Jung Chang, Daniel Guidotti, Gee-Kung Chang,
Department of Electrical and Computer Engineering, Georgia Institute of Technology
IBM Technical Contact: Moises Cases, IBM Systems & Technology Group, Development, Distinguished Engineer, System Electrical Packaging
IBM Sponsor: William Ott, IBM Systems & Technology Group, Development, VP, eServer xSeries & IntelliStationDevelopment
Original Proposal: Design, Integration, and Test of High-speed Optical Interconnects using Embedded Optoelectronic Components for Server Applications
Algorithms for Client Workload Consolidation
Y. Chen A. Das Q. Wang, A. Sivasubramaniam, Department of Computer Science and Engineering, Pennsylvania State University
IBM Technical Contact: Moises Cases, IBM Systems & Technology Group, Development, Distinguished Engineer, System Electrical Packaging
IBM Sponsor: William Ott, IBM Systems & Technology Group, Development, VP, eServer xSeries & IntelliStationDevelopment
Original Proposal: Autonomic Power Management for BladeCenters Hosting Client Workloads
Design, Modeling and Characterization of Embedded Capacitors for Decoupling Applications
Prathap Muthana, Ege Engin, P.M. Raj, Madhavan Swaminathan, Rao Tummala, Venkatesh Sundaram,
Department of Electrical and Computer Engineering, Georgia Institute of Technology
IBM Technical Contact: Moises Cases, IBM Systems & Technology Group, Development, Distinguished Engineer, System Electrical Packaging
IBM Sponsor: William Ott, IBM Systems & Technology Group, Development, VP, eServer xSeries & IntelliStationDevelopment
Original Proposal: Design, Fabrication, Characterization and Test of Nano-materials for Embedded Decoupling in Mid-Frequency Range for Server Applications
Massively Parallel Conformal FDTD on a BlueGene Supercomputer
R. Mittra, Wenhua Yu and M. R. Hashemi,
Electromagnetic Communication Laboratory, Penn State University Park
IBM Technical Contact: Moises Cases, Distinguished Engineer, IBM Systems and Technology Group, xSeries eServer Development
IBM Sponsor: Kelvin Hawkins, IBM Systems &Technology Group, Director of xSeries and IntelliStation Hardware Development and
Michael Nealon, Project Manager of ESG Electronic Packaging Integration
Original Proposal: Application of the PFDTD Maxwell Solver for modeling and simulation of Electronic Packages using the Blue Gene/L
Profiling Memory Subsystem Performance in an Advanced POWER Virtualization Environment
Diana Villa, Mitesh Meswani and Patricia Teller,
Department of Computer Science, University of Texas at El Paso
IBM Technical Contacts: Carole Gottleib and Bret Olszewski, IBM Systems & Technology Group, Development, AIX Performance
IBM Sponsor: George Wang, Vice President, Systems Performance, STG, and John Makis, IBM Systems &Technology Group, Program Director, iSeries / pSeries Systems Performance
Original Proposal: Comprehensive Memory Performance Studies of POWER-based Platforms: Phase II
On-the-Fly Estimation of IC Macromodels for the Assessment of High-Speed Digital System Performance
F. G. Canavero, S. Grivet-Talocia, I. A. Maio, I. S. Stievano
Politecnico di Torino, Dipartimento di Elettronica, Torino, Italy
IBM Technical Contact: George Katopis, IBM Systems & Technology Group, Development, ESG Packaging Strategist
IBM Sponsor: Greg Varone, IBM Systems & Technology Group, Development, Director, Systems Technology Development
Original Proposal: Assessment of High-Speed Digital System Performance
Guarding Programs Against Attacks with Dynamic Data Flow Analysis
Walter Chang Calvin Lin, Department of Computer Sciences, University of Texas at Austin
IBM Technical Contacts: Doc Shankar, IBM Systems &Technology Group, Development, Certified Executive IT Architect, Linux Security Lead, and Ray Young, IBM Systems & Technology Group, Development, Mgr LTC - MCP & Embedded
IBM Sponsor: Ralph Christ, IBM Systems &Technology Group, Development, Program Director, LTC eServer Development
Original Proposal: Using Dynamic Data-Flow Analysis to Improve Software Security
A Risk Management Model for Micro-Processor Industry
James S. Dyer and Saurabh Bansal, McCombs School of Business, University of Texas at Austin
IBM Technical Contact: Bill Ciarfella, IBM Systems &Technology Group, Development, Squadrons + Program Management
IBM Sponsor: Erich Baier, IBM Systems &Technology Group, Development,
Vice President, HW Program Management
Original Proposal: Risk Management in New Product Development Decisions
Reinforcement Learning with Evolutionary Function Approximation for Server Job Scheduling
Shimon Whiteson and Peter Stone, Department of Computer Sciences, University of Texas at Austin
IBM Technical Contacts: John Sweitzer, IBM Software Group, Tivoli, IBM Distinguished Engineer, Chief Architect for Autonomic Computing, and Patricia Rago, IBM Software Group, Tivoli, Project Manager, Autonomic Computing
IBM Sponsor: Jeff Kephart, IBM Research, Sitting, typing, software agents and autonomic computing
Original Proposal: Self-Configuring Hardware for Distributed Computer Systems
Timing-aware Power Noise Reduction in Placement
Chao-Yang Yeh and Malgorzata Marek-Sadowska,
Department of Electrical and Computer Engineering, University of California, Santa Barbara
IBM Technical Contact: Frank Liu, Austin Research Lab, Tools & Technology
IBM Sponsor: Lorraine Herger, Director, Austin Research Laboratory
Original Proposal: Timing Driven Decap Insertion During Placement
Exploring Regularity for Inductive Fault Analysis
Jason G. Brown and R. D. (Shawn) Blanton,
Department of Electrical and Computer Engineering, Carnegie Mellon University
IBM Technical Contact: Anne Gattiker, Austin Research Lab, Tools & Technology
IBM Sponsor: Lorraine Herger, Director, Austin Research Laboratory
Original Proposal: Test and Diagnosis of Manufacturability-Oriented
Technologies
A New Methodology for Interconnect Parasitics Extraction Considering Photo-Lithography Effects
Ying Zhou, Zhuo Li, Yuxin Tian, Weiping Shi,
Department of Electrical Engineering, Texas A&M University
IBM Technical Contact: Frank Liu, Austin Research Lab, Tools & Technology
IBM Sponsor: Lorraine Herger, Director, Austin Research Laboratory
Original Proposal: Modeling and Extraction of Interconnect Parasitic under Process Variation
A Low Power Microsystem with Applications for On-Die Monitoring and Adaptive Control
Robert M. Senger, Eric D. Marsman, Richard Brown*,
Department of Electrical and Computer Engineering, University of Michigan at Ann Arbor, *University of Utah
IBM Technical Contact: Kevin Nowka, Austin Research Lab, Manager, Exploratory VLSI Design
IBM Sponsor: Lorraine Herger, Director, Austin Research Laboratory
Original Proposal: Embedded Microcontroller to Improve Power, Performance and Yield
Fast Algorithms For Slew Constrained Minimum Cost Buffering
Shiyan Hu, Charles J. Alpert*, Jiang Hu, Shrirang Karandikar*, Zhuo Li, Weiping Shi and C. N. Sze*
Department of Electrical Engineering, Texas A&M University, *IBM Austin Research Laboratory
IBM Technical Contact: Chuck Alpert, Austin Research Lab, Tools & Technology
IBM Sponsor: Lorraine Herger, Director, Austin Research Laboratory
Original Proposal: Highly Scalable Interconnect Optimization Algorithms for Integrated Synthesis/Layout System
A New LP Based Incremental Timing Driven Placement for High Performance Designs
Tao Luo, David Newmark*, and David Z. Pan,
Electrical and Computer Engineering Department, University of Texas at Austin, *Advanced Micro Devices
IBM Technical Contacts: Ruchir Puri, Watson Research Lab, Manager, Logic & Physical Synthesis and Chuck Alpert, Austin Research Lab, Tools & Technology
IBM Sponsor: Lorraine Herger, Director, Austin Research Laboratory
Original Proposal: Physical Synthesis Research on Nanometer Design and Manufacturing Closure
Grid and Cyber-infrastructure Activities at UPRM
Jaime Seguel, Electrical and Computer Engineering Department, University of Puerto Rico at Mayagüez
IBM Technical Contact: Pete Martinez, Vice President, Business Consulting Services and Senior Location Executive IBM South Florida
IBM Sponsor: Nick Bowen, Vice President, Software Development, IBM Systems and Technology Group
Design and Implementation of the NetTraveler Middleware System based on Web Services
Manuel Rodriguez, Electrical and Computer Engineering Department, University of Puerto Rico at Mayagüez
IBM Technical Contacts: Jim Knighton, AIX Diagnostics Development
and Norm Pass, Manager of File System and Application Technology
IBM Sponsor: Pat Butterfield, Manager, AIX Network Security, Java, LDAP, Grid Toolbox
Diameter-constrained Clustering: Algorithms and Experiments for a Layout Coverage Problem
Shi Zhong and David DeMaris*
Florida Atlantic University, *IBM Systems and Technology Group
IBM Technical Contact: David DeMaris, IBM Systems and Technology Group
IBM Sponsor: John Acocella, Vice President, OEM ASICS and Processor,
IBM Systems and Technology Group
FastPlace 2.0: An Efficient Analytical Placement Algorithm for Mixed-Mode Designs
Natarajan Viswanathan, Department of Electrical and Computer Engineering, Iowa State University
IBM Technical Contact: Chuck Alpert, Tools and Technology, IBM Austin Research Laboratory,
IBM Sponsor: Lorraine Herger, Director, IBM Austin Research Laboratory
Transforming IBM System Level Electrical Design and Integration Support for Server Designs [Proposal]
William B. Rouse, Tennenbaum Institute, Georgia Institute of Technology
IBM Technical Contact: Moises Cases, Distinguished Engineer, IBM Systems and Technology Group, xSeries eServer Development
IBM Sponsor: Kelvin Hawkins, IBM Systems &Technology Group, Director of xSeries and IntelliStation Hardware Development
User Interface Design, Transaction Measurement, and Usability Engineering for Digital Rights Managed Media on a Cluster of Authorized Devices [Proposal]
Randolph Bias, School of Information, University of Texas at Austin
IBM Technical Contacts: Ann Marie Maynard, CAS Program Director, and Bill Bodin, IBM CHQ,
Enterprise On Demand, STSM - Chief Architect - On Demand Workplace - Mobile Edition
IBM Sponsor: Todd Moore, IBM Software Group, Application and Integration Middleware Software
On-Chip Jitter Measurement [Proposal]
Kevin Kornegay, Department of Electrical and Computer Engineering, Cornell University
IBM Technical Contacts: Cindy Yokley, IBM Systems &Technology Group, Development
IBM Sponsor: Kathy Papermaster, IBM Systems &Technology Group, Development, Director, STI Design Center
UT Grid: Developing a Campus-Wide Distributed Computing Environment [Proposal]
Jay Boisseau, Edward Walker, and Warren Smith, Texas Advanced Computing Center, University of Texas at Austin
IBM Technical Contact: Elizabeth B. Davis, IBM Sales & Distribution, Public Sector, Client Representative, K-12 and HE Texas
IBM Sponsor: Albert Bunshaft, IBM Systems &Technology Group, On Demand Business, VP, Grid Computing Sales and Business Development
SRAM Variability Measurements [Proposal]
Borivoje Nikolic, Department of Electrical Engineering and Computer Sciences, University of California, Berkeley
IBM Technical Contact: Kevin Nowka, Austin Research Lab, Manager, Exploratory VLSI Design
IBM Sponsor: Lorraine Herger, Director, Austin Research Laboratory/p>
Extremely Fast Placement Algorithms [Proposal]
Chris Chu, Department of Electrical and Computer Engineering, Iowa State University
IBM Technical Contact: Chuck Alpert, Austin Research Lab, Tools & Technology
IBM Sponsor: Lorraine Herger, Director, Austin Research Laboratory
See Projects from Previous Years