Jayakumaran Sivagnaname

About me

Jayakumaran Sivagnaname

Researcher


Research lab: Austin Research Lab


PROFESSIONAL EXPERIENCE

IBM RESEARCH LAB, Austin, TX • 2004-Present

Invent, prototype, and implement advanced test structures to assess and improve the performance of IBM’s manufacturing technologies. Design at the conceptual, system, circuit, and layout levels, and support the porting to IBM’s manufacturing environment. Designed and implemented high-performance, low power logic circuits.

Key Contributions:
• Designed 7 patented/patent-pending inventions throughout tenure in this position.
• Led a team in designing, developing, and testing a unique characterization structure that allows manufacturing units to significantly reduce the yield loss due to gate oxide defects.
• Currently designing macros for the floating-point unit of the BlueGene/Q processor.
• Created an innovative circuit family (Controlled-load Limited Switch Dynamic Logic) for use in high-performance circuits.


UNIVERSITY OF MICHIGAN, Ann Arbor, MI • 2000-2004

Research Assistant
Performed as a graduate-student Research Assistant at the Solid State Electronics Lab of the EECS department. Identified research topics in the VLSI circuit area and devised solutions.

Key Contributions:
• Designed, fabricated, and tested a dual-issue 4-way superscalar out-of-order execution PowerPC fixed-point unit processor in a 0.18µm TSMC bulk CMOS process; earned 1st prize in VLSI Design Contest at the 16th IEEE International Conference, January 2003.
• Analyzed and evaluated high-performance SOI pseudo-nMOS circuit design styles.

Last updated 9 Jul 2008

Content navigation

Related links