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DAISY: Dynamic Compilation for 100% Architectural Compatibility

        Although VLIW architectures offer the advantages of simplicity of design and high issue rates, a major impediment to the use of VLIW and other novel ILP architectures is that they are not compatible with the existing software base. We describe new simple hardware features for an ILP machine called DAISY (Dynamically Architected Instruction Set from Yorktown). DAISY is specifically intended to emulate existing architectures, so that all existing software for an old architecture (including operating system kernel code) runs without changes on the VLIW. Each time a new fragment of code is executed for the first time, the code is translated to VLIW primitives, parallelized and saved in a portion of main memory not visible to the old architecture, by a Virtual Machine Monitor (software) residing in read only memory. Subsequent executions of the same fragment do not require a translation (unless cast out). We describe new very fast compiler algorithms for accomplishing the dynamic translation and parallelization across multiple paths and loop iteration boundaries. We discuss the architectural requirements for such a machine to deal with issues including self-modifying code, precise exceptions, and aggressive reordering of memory references in the presence of strong MP consistency and memory mapped I/O. We have implemented the dynamic parallelization algorithms for the PowerPC architecture. The initial results show high degrees of instruction level parallelism with reasonable translation overhead and memory usage.

By: Kemal Ebcioglu and Erik Altman

Published in: RC20538 in 1996

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