IBM Journal of Research and Development
IBM Skip to main content
  Home     Products & services     Support & downloads     My account  

  Select a country  
Journals Home  
  Systems Journal  
Journal of Research
and Development
    Current Issue  
    Recent Issues  
    Papers in Progress  
    Search/Index  
    Orders  
    Description  
    Patents  
    Recent publications  
    Author's Guide  
  Staff  
  Contact Us  
  Related links:  
     IBM Research  

IBM Journal of Research and Development  
Volume 36, Number 5, Page 829 (1992)
S/390: materials & packaging
  Full article: arrowPDF   arrowCopyright info





   

Improved performance of IBM Enterprise System/9000 bipolar logic chips

by A. E. Barish, J. P. Eckhardt, M. D. Mayo, W. A. Svarczkopf, S. P. Gaur
The performance required for logic gate arrays by the IBM Enterprise System/9000™ (ES/9000™) family of water-cooled processors was obtained by redesigning chips that previously consisted of emitter-coupled logic (ECL) circuits. Multiple bipolar logic circuit families were implemented for the first time on a single IBM chip by using a modular cell approach. In 60% of the ECL circuits, ac coupling in ECL gates reduced the maximum operating power per ECL circuit on ES/9000 chips by 50% and decreased the signal delay per loaded gate by 30%, to 150 ps. About 10-20% of the remaining ECL circuits were replaced by differential current switches (DCS) which dissipated less power and improved the overall chip performance. Circuits to communicate between ECL and DCS circuit families and to improve DCS circuit reliability were included on the ES/9000 chips without affecting logic function density.
Related Subjects: Logic; Differential current switch (DCS); Integrated circuit design