|
|
 |
|
 |
Volume 39, Number 4, Page 465 (1995)
On-chip interconnection technology |
|
Full article:
 PDF
| |
|
Copyright info |
|
|
|
|
|
| |
|
Electromigration and stress-induced voiding in fine Al and Al-alloy thin-film lines |
|
by C.-K. Hu, K. P. Rodbell, T. D. Sullivan, K. Y. Lee, D. P. Bouldin
|
|
|
|
 |
|
Physical phenomena underlying failure due to electromigration and stress-induced voiding in fine Al and Al-alloy thin-film conducting lines are examined in the context of accelerated testing methods and structures. Aspects examined include effects due to line isolation (the absence of reservoirs at conductor ends), solute and precipitate phenomena, conductor critical (Blech) length, microstructure, film deposition conditions, and thermal processing subsequent to film deposition. Emphasis is on the isolated, submicron-wide, Al(Cu)-based thin-film interconnection lines of IBM VLSI logic and memory chips. |
|
|
| Related Subjects: Aluminum; Integrated circuits; Interconnection technology; Reliability; Semiconductor technology |
|
|
|
