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IBM Journal of Research and Development  
Volume 40, Number 4, Page 407 (1996)
IBM ASIC design and testing
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BooleDozer: Logic synthesis for ASICs

by L. Stok, D. S. Kung, D. Brand, A. D. Drumm, A. J. Sullivan, L. N. Reddy, N. Hieter, D. J. Geiger, H. H. Chao, P. J. Osler
Logic synthesis is the process of automatically generating optimized logic-level representation from a high-level description. With the rapid advances in integrated circuit technology and the resultant growth in design complexity, designers increasingly rely on logic synthesis to shorten the design time while achieving performance objectives. This paper describes the IBM logic synthesis system BooleDozer™, including its organization, main algorithms, and how it fits into the design process. The BooleDozer logic synthesis system has been widely used within IBM to successfully synthesize processor and ASIC designs.
Related Subjects: ASICs; CMOS; Computer-aided design; Design automation; Integrated circuit design; Logic synthesis; LSI design automation; Microelectronics; VLSI