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IBM Journal of Research and Development  
Volume 52, Number 3, Page 285 (2008)
Soft Errors in Circuits and Systems
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Soft-error resilience of the IBM POWER6 processor input/output subsystem

by C. Bender, P. N. Sanda, P. Kudva, R. Mata, V. Pokala, R. Haraden, M. Schallhorn
The soft-error resilience of the IBM POWER6™ processor I/O (input/output) subsystem was measured using proton beam irradiation to accelerate the effect of single-event upsets. Test programs exercised each of the adapters on the chip. Error rates were measured for various cases ranging from idle to high I/O bandwidth and utilization. The POWER6 processor and I/O hub subsystem work together to maintain resiliency even under strenuous irradiation conditions.
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