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Design automation methodology and rf/analog modeling for rf CMOS and SiGe BiCMOS technologies |
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by D. L. Harame, K. M. Newton, R. Singh, S. L. Sweeney, S. E. Strang, J. B. Johnson, S. M. Parker, C. E. Dickey, M. Erturk, G. J. Schulberg, D. L. Jordan, D. C. Sheridan, M. P. Keene, J. Boquet, R. A. Groves, M. Kumar, D. A. Herman,Jr., B. S. Meyerson
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The rapidly expanding telecommunications market has led to a need for advanced rf integrated circuits. Complex rf- and mixed-signal system-on-chip designs require accurate prediction early in the design schedule, and time-to-market pressures dictate that design iterations be kept to a minimum. Signal integrity is seen as a key issue in typical applications, requiring very accurate interconnect transmission-line modeling and RLC extraction of parasitic effects. To enable this, IBM has in place a mature project infrastructure consisting of predictive device models, complete rf characterization, statistical and scalable compact models that are hardware-verified, and a robust design automation environment. Finally, the unit and integration testing of all of these components is performed thoroughly. This paper describes each of these aspects and provides an overview of associated development work. |
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| Related Subjects: Circuit and device technology; CMOS; Design automation; Semiconductor devices; Silicon-germanium |
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