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IBM Journal of Research and Development  
Volume 25, Number 2/3, Page 152 (1981)
VLSI Circuit Design
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Wire Length Distribution for Placements of Computer Logic

by W. E. Donath
It is shown from simple theoretical considerations that the distribution fk of wire lengths for a good two-dimensional placement on a square Manhattan grid should be of the form fk = g/kγ (1 ≤ k ≤ L) and fk ≈ 0 (k > L), where γ is related to the Rent partitioning exponent p by the equation 2p + γ ≈ 3. Three placements were investigated and the distribution functions for wire length were found to follow the above relationships.
Related Subjects: Integrated circuit design; LSI; LSI design automation; Mathematics (applied)