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IBM Journal of Research and Development  
Volume 21, Number 4, Page 306 (1977)
Nontopical Issue
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Two-Dimensional Analysis of High-Voltage Power Transistors

by S. P. Gaur
The internal behavior of a typical n-p-n--n+ high-voltage power transistor is presented for several specific steady-state operating conditions obtained from a two-dimensional mathematical model. Internal self-heating and avalanche multiplication effects are taken into account. Poisson's equation, electron and hole continuity equations, and the heat flow equation are solved numerically in a two-dimensional region with the input parameters of device dimensions, doping profile, boundary conditions for external contacts, and various material constants for silicon. The collector n--n+ interface is the region of high electrical and thermal stress that causes second breakdown failure at high-voltage and high-current operating conditions. The combined effects of various high-injection levels are illustrated.
Related Subjects: Circuit and device technology